It has become well-known practice to automate industrial processes by the use of a special purpose computer known as a programmable controller ("PC" - Table 1 lists this and other abbreviations used in the text). The PC periodically scans input variables from the process, performs suitable logical manipulations on the inputs and updates output variables for the process.
Reduced to bare essentials, the industrial process may be regarded as having a number of sensors and drivers. The sensors provide input values representative of the state of the process at a given time; the drivers respond to output values, and thereby control various aspects of the process. Some of the inputs and outputs are binary, corresponding to limit switches, relay contacts, proximity switches and the like, while others may be numeric, corresponding to temperatures, pressures, positions, and other physical parameters that characterize the process being controlled. However, it may be assumed that suitable interface modules have been provided so that the inputs and outputs appear to the PC as simple binary or 16-bit inputs and outputs.
Typically, there are a large number of input sensors and output drivers that must be serviced. While some large systems might have as many as 2000-4000 variables, 500 is a more representative member.
Despite the phenomenal advances in computer technology, general purpose computers are still too slow to scan the large numbers of inputs, calculate the specialized user program based on these inputs, determine the new outputs, and update the outputs for the large systems required. Accordingly, a common PC configuration comprises a special purpose computer embedded within, or in some way coupled to, a general purpose computer. The special purpose computer performs the scan cycle (reading the inputs and computing the new value of the outputs) as rapidly as possible, while the general purpose computer attends to numeric calculations for the process and communications with peripheral devices, terminals, and the like. The special purpose computer may be referred to as the "scan processor" or "scanner." Except where the distinction is important, the term "PC" will sometimes be applied to the scanner alone, and sometimes to the scanner and the general purpose computer together.
The current state of PC's reflects the prior practice of "programming" the system to be monitored and controlled by hard-wiring a representative relay logic ladder. The ladder would comprise a generally rectangular array of interconnected relay contacts and coils disposed between opposite terminals of a power supply. The state of any given relay contact would reflect the state of a corresponding switch to be monitored, and a given relay coil would control a corresponding driver to be actuated. The response time of such a system would be determined by the characteristic time for the closing of a relay, generally about 5-10 ms. The relays would often have multiple contacts to permit the corresponding input variable to be sensed at multiple places in the ladder.
In view of this historical development, programmable controllers evolved with a view to simulating such relay logic ladders. PC's are thus provided with a programming panel with which the programmer enters a graphical representation of the ladder into the computer memory. The graphical representation is then converted into some sort of internal instruction stream (i.e., is assembled or compiled) so that subsequent execution of the instructions in the stream causes the appropriate logical manipulations to be performed. The sensor and driver values are stored in a working memory, called an input/output image memory ("IOIM"), which is accessed by the PC.
While the PC clearly represents an advance over the hard-wired logic ladder, the PC cannot always match the real world in speed, especially where relays have multiple contacts. Thus, for the PC to compete on a speed basis, it should be able to complete a scan cycle in the characteristic relay response time. However, even the currently obtainable PC's are often not fast enough to scan 4000 input occurrences (perhaps corresponding to fewer than 1000 actual inputs, each of which appears at several places in the program) in 5 ms. Therefore, for subsets of inputs and outputs that must be updated at shorter intervals than that of the scan cycle, corresponding portions of the program must be executed several times during a complete scan cycle.
The scanner speed (or lack thereof) depends on two parameters, the time required for the scanner to effect one memory access, and the number of memory accesses required for the scanner to process an input variable. The first parameter may or may not depend on the particular scanner design. If the scanner operates at a speed where the memory itself is the limiting factor, the memory access time may be improved by using faster (and more expensive) memory. However, most currently available scanners do not operate at the maximum speed permitted by the memory, and so cannot be significantly speeded up merely by using faster memory.
The second parameter is a function of the assumptions built into the scanner itself, and although not well appreciated, provides a figure of merit which can be used to evaluate the scanner, regardless of the particular generation of memory devices employed.
Each scanner will have a best case program ("BCP") where the Boolean operations and structure of the program conform exactly to the assumptions designed into the scanner. Such a program requires one access per input, and represents a case where the order of input variables tells all. Only the input description (name, address, sense of complementation) is necessary to do the calculation; all else is implicit in the scanner design. While some programs can execute at this speed on a given scanner, most can't.
Each scanner will also have a worst case program ("WCP") where the assumptions of the scanner are always incorrect. For such a case, each access of the input description must be followed by another access to correctly specify the program operation and structure.
In addition to limiting speed, the assumptions built into a scanner can limit the range of programs which can be compiled. Such limitation may be viewed as operating at one or both of two levels of inflexibility.
The first level of inflexibility relates to limitations on the number of languages that can be programmed. While ladder is by far the most common language (accounting for about 80% of the PC's worldwide), some applications may best lend themselves to other representations, such as Boolean and logic diagram (referred to as "logigram"). Indeed, the prevalence of ladder may represent no more than the fact that the largest manufacturers of PC's provide machines designed to be programmed in ladder to solve ladder diagrams. However, a machine optimized for one of the languages will in general be unsuitable, or at least inefficient, for use in solving expressions or diagrams in other languages.
In Boolean, the variables are expressed as Boolean quantities, and the logical relationships are described in terms of expressions containing the logical `AND` and `OR` functions with nested parentheses as appropriate. In logigram, the variables are represented as logic levels or signals in a network of AND and OR gates. The ladder and logigram representations are highly structured, while the Boolean representation is considerably less so.
The second level of inflexibility relates to limitations on a scanner's ability within a particular language. For example, some prior art scanners incorporate a set of assumptions which limit the range of topological variations of ladder diagrams that may be solved. Thus, fanouts, polite crossings of wires, wrap-arounds (from the left side of the ladder back to the right side), and outputs from internal junction points may be impermissible. For such a ladder diagram to be soluble on such a scanner, the diagram must be re-drawn in an equivalent (but permissible) form by a human programmer.
In considering the design of a PC, there are a number of apparently mundane considerations that turn out to represent fairly fundamental constraints. The choice of word length is an example of this. Given that most digital logic is carried out in 8-bit multiples, a word length that is an 8-bit multiple is strongly indicated. For a PC that includes a special purpose computer operating in conjunction with a general purpose computer, some of the characteristics of the general purpose computer are imposed on the special purpose computer. This militates strongly in favor of a 16-bit word, given the current generation of microprocessors.
Once the appropriate word length is decided, the sizes of systems that must be controlled further constrain the allocation of bits within the word. Of the 16 bits, a 12-bit address field (to address 4000 contacts) may be considered to be a practical necessity, although many systems may only require 1000-2000 contacts. Even so, larger systems might require more than 4000 contacts to be addressed, thereby necessitating some sort of extended address scheme. With a 12-bit address field, the opcode has only 4 bits.
Thus, despite the normal tendency to accept the problems and limitations discussed above as inherent or inevitable, applicants have recognized the need for a programmable controller that makes efficient use of memory (for speed), may be programmed in several of the more commonly used languages, and has few limitations within a given language. Given the typical design constraints, such a PC would need a small but very powerful set of instructions to provide all the above benefits within a small opcode field.